應屆畢業生
碩士
最近更新
11043人關注
職位描述
該職位還未進行加V認證，請仔細了解后再進行投遞！
職責描述:
1. Work closely with process RD team to develop DRC/LVS for design readiness.
2. Provide customer support to world-wide leading design house.
3. Initial more innovation to continue optimize development efficiency.
4. Work closely with various departments (Physical design/integration/Device RD/Product/ESD) on their design requirements.
5. Work closely with EDA partner for tool qualification and methodology enhance.
任職要求:
1. Good knowledge of semiconductor FEOL/BEOL process and chip design
2. Knowledge of EDA partner (Mentor, Synopsys, Cadence, etc.) tools suite is a plus. Especially Laker /Virtuoso /Calibre.
3. Scripting and programming experience using several of the following: Perl, Python, C, C , TCL, Skill.
4. Ability to work across teams to drive a solution, problem solver and self-motivated.
5. The ideal candidate will have experience in DRC/LVS development.
6. MS or above in EE, CS related fields.
截止日期：2025年09月05日
注：聯系我時，請說是在江蘇人才網上看到的。
工作地點
地址：南京江寧區南京-江寧區九龍湖
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職位發布者
劉先生HR
臺積電(南京)有限公司
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電子技術·半導體·集成電路
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200-499人
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外商獨資·外企辦事處
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浦口經濟開發區紫峰路16號
